1. Field of the Invention
The present invention relates to a jitter generation apparatus, a device test system using the same, and a jitter generation method and, more particularly, to a jitter generation apparatus which adopts a technique for generating jitters over a broad band, a device test system using the same, and a jitter generation method.
2. Description of the Related Art
Measurement items for a data transmission system include jitter tolerance measurement that measures a tolerance level against a phase fluctuation (jitter) of a data signal.
In general, a jitter tolerance permitted in, e.g., a transmission device has to tolerate jitters having large amplitudes in a low jitter frequency region, and those having relatively small amplitudes in a high jitter frequency region.
A data transmission system to be measured is speeded up year by year, and is required to be able to assign jitters of several GHz to signals having bit rates of several 10 GHz.
Therefore, a jitter generation apparatus used in the jitter tolerance measurement is required to be able to generate jitters having large amplitudes in a low frequency region, and has to accurately generate jitters having even relatively small amplitudes until a high frequency region up to several GHz.
FIG. 17 shows an example of a jitter mask which represents the band and magnitude characteristics of jitters required for the aforementioned jitter generation apparatus.
That is, in this jitter mask, a jitter amplitude upper limit is constant, i.e., 4000 (UIp−p) from a lower limit frequency f1 (e.g., 9 Hz) to a frequency f2 (e.g., 220 Hz).
On the other hand, from the frequency f2 to a frequency f3 (e.g., 4 MHz), the jitter amplitude upper limit monotonically decreases from 4000 (UIp−p) to 0.22 (UIp−p).
Then, from the frequency f3 to an upper limit frequency f4 (e.g., 2 GHz), the jitter amplitude upper limit is constant, i.e., 0.22 (UIp−p).
Furthermore, a jitter amplitude lower limit is 0.001 (UIp−p) in a full band from the lower limit frequency f1 to the upper limit frequency f4.
As a technique for generating jitters over a broad band, a method based on phase modulation using a phase locked loop (PLL) circuit is conventionally used.
This PLL circuit generally has the following arrangement. That is, the PLL circuit generally frequency-divides an output signal from a voltage controlled oscillator (VCO), inputs the frequency-divided output and a reference signal to a phase comparator. Then, the PLL circuit generates a DC control signal required to synchronize the frequency-divided output from the VCO with the reference signal, and supplies the control signal to the VCO.
When this PLL circuit performs phase modulation, a method of applying a modulation signal as the control signal input to the VCO, a method of varying a feedback frequency division ratio in a loop, and the like may be used.
As a method of generating jitters, a method of generating a phase-modulated signal by inputting special waveform signals as I and Q signals of an quadrature modulator using the quadrature modulator is known in addition to the aforementioned method using the PLL circuit.
This method using the quadrature modulator uses the following principle.
Note that the following description will be given taking a signal assigned with a sinusoidal wave jitter as a type of jitter.
A signal assigned with a sinusoidal wave jitter is a signal phase-modulated by a sinusoidal wave, and can be expressed by:Y(t)=sin [ωt+m·sin(pt)]
(where m is a modulation index, ω is a carrier angular frequency, and p is an angular frequency of a modulation signal)
By expanding the above equation, we have:
                              Y          ⁡                      (            t            )                          =                ⁢                                            sin              ⁡                              [                                  m                  ·                                      sin                    ⁡                                          (                      pt                      )                                                                      ]                                      ·                          cos              ⁡                              (                                  ω                  ⁢                                                                          ⁢                  t                                )                                              +                                    cos              ⁡                              [                                  m                  ·                                      sin                    ⁡                                          (                      pt                      )                                                                      ]                                      ·                          sin              ⁡                              (                                  ω                  ⁢                                                                          ⁢                  t                                )                                                                            =                ⁢                                            I              ⁡                              (                t                )                                      ·                          cos              ⁡                              (                                  ω                  ⁢                                                                          ⁢                  t                                )                                              +                                    Q              ⁡                              (                t                )                                      ·                          sin              ⁡                              (                                  ω                  ⁢                                                                          ⁢                  t                                )                                                        
Therefore, a signal assigned with a jitter of a sinusoidal wave having a desired modulation frequency (p/2π) and desired modulation depth (2 mradp−p) or (m/πUIp−p) by inputting I and Q signals which are supplied to the quadrature modulator with respect to a sinusoidal wave signal having the carrier angular frequency ω, and are respectively given by:I(t)=sin [m·sin(pt)]Q(t)=cos [m·sin(pt)]
Note that the technique for performing phase modulation by varying the feedback frequency division ratio using the PLL circuit is disclosed in, for example, patent document 1.
Also, the technique for generating jitters using the quadrature modulator is disclosed in non-patent document 1.
The technique for applying phase modulation to a frequency-divided signal by the PLL circuit using the quadrature modulator is disclosed in patent document 1.    Patent Document 1: Japanese Patent No. 3086706 (International Publication WO97/06600)    Patent Document 2: Jpn. Pat. Appln. KOKAI Publication No. 2005-65220    Non-Patent Document 1: “Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A” application Note (especially, see FIG. 18 of the 9th page)